Cellular SoC Design and Frontend-STA Intern (m/f/d)

Summary

Posted: Role Number:200569366
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, amazing people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product!
Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a forward-thinking and hardworking student to join our team at Apple.
Students are a crucial part of the team; you can work on critical projects, be a part of the Apple community, get an insider's perspective on the way we work, and learn from expert engineers who inspire us to build unique products
In this role you will be key part of the Cellular SoC Integration team in Munich or Linz. As Digital Design and Frontend STA intern you will work with and learn from RTL designers, Physical designers and other integration teams. You will work on very challenging designs and advanced technologies nodes for constraints development as well as design- and timing-analysis.

Description

In this student role, you will work within a segment of Apple's Engineering team that specializes on Cellular SoCs. You will develop internal tools and scripts to increase the team's efficiency, support development processes, and understand how this work is integrated and affecting Apple's products. You will also learn how to work within Apple's internal development environment and work processes. We are looking for a dedicated student who loves challenges, brings the ability to learn and wants to become a part of our multi-faceted team.

Minimum Qualifications

• You have a solid understanding of Verilog and the ability to analyze RTL/Netlist designs
• You have some scripting and programming knowledge with one or more of the following: TCL, Python, Perl, and Make
• You are familiar with the ASIC/FPGA Design processes and interested in areas like Synthesis and Static Timing Analysis (STA)
• Your communication skills are excellent, and like the rest of us here at Apple, you love working in an open and multi-cultural environment

Preferred Qualifications

• Currently enrolled in penultimate year of Master Degree program in Electrical Engineering or equivalent.
• Available to do internship for 6,9 or 12 months.